The multiplexing of multiple analog-to-digital converters to achieve a higher sampling rate is wellknown. Often, it is desired to have an analog to digital converter (ADC) sampling rate that is somewhat higher than is attainable with a single ADC using the current technology. By using more than one ADC and staggering their sample times, it is possible to increase the combined sample rate.
For example, the maximum sampling rate of a single ADC may be 500 megahertz and it is desired to sample an analog signal at one gigahertz. Two ADCs operating at their maximum rate of 500 megahertz may be multiplexed to achieve an effective sample rate of one gigahertz. The two ADCs are simply placed in parallel and alternate in sampling an analog signal. Each of the ADCs produces an output stream of digital data reflecting the value of the analog signal at the times sampled by that ADC. The two output streams are combined to form a single output stream equivalent to an output stream of a single ADC operating at one gigahertz. The effective sampling rate can be further increased by multiplexing additional ADCs. By multiplexing ADCs in this manner, the effective maximum sample rate is the number of multiplexed ADCs times the maximum sample rate of a single ADC.
One major problem presented by the multiplexed ADC approach is known as aperture skew. Aperture skew occurs when sample times of the additional ADCs do not occur at exactly the right time interval between the sample times of the first ADC. In the case of two multiplexed ADCs, the second ADC's sample times should occur exactly half-way between the first ADC's sample times. With four ADCs, the samples should be timed to occur at the quarter boundaries of the time interval between samples of the first ADC.
A common solution to the aperture skew problem is to provide a master sample and hold circuit which samples an input analog signal at the full effective sample rate. Consequently, as long as the master sample and hold samples at exact intervals, each of the multiplexed ADCs need only receive its signal sample sometime before the next sample is acquired by the master sample and hold.
In the present invention, a number of major performance improvements to multiplexed ADCs are made possible through the use of dithering. Use of dithering is known in the art. For example U.S. Pat. No. 4,550,309 discloses a residue digital-to-analog converter in which the digital resolution of the converter is enhanced by introducing a random dither signal into the process. In the present invention, however, dithering is used to detect and correct gain error in an analog-to-digital conversion process and differential gain errors in a multiplexed ADC circuit.
In most applications involving dithering, a dither signal is generated by a pseudo-random noise (PRN) generator, converted to analog in a digital-to-analog converter (DAC), and added to an analog signal before conversion in an ADC. The dither signal is then subtracted from the output of the ADC. The presence of the dither signal during the conversion is used to obtain a number of well-known advantages However, the dither signal may also be a source of additional error if the entire dither signal is not removed from the output.
Between generation of the dither signal and subtraction of the dither signal from the output, the dither signal may be subject to amplification by the DAC or the ADC. When the dither signal has been amplified and only the original amount of the dither signal subtracted from the output, some residue of the dither signal remains in the output This is one form of error caused by amplification or gain within an ADC circuit.
In an analog-to-digital conversion, the analog signal is also amplified by some factor during the conversion. This amplification or gain of the conversion process can vary due to a change in the operating conditions of the converter. Any variance of the gain (gain instability) introduces error since the conversion will not consistently generate the same value of digital output for the same value of the analog signal.
The present invention detects and corrects these gain errors by correlating the output with the original dither signal to detect any residual components of the dither signal remaining in the digital output signal. Any residue of the dither signal is indicative of gain error in the conversion. More specifically, the dither signal has been amplified by some amount during conversion by the DAC or the one or more ADCs. However, only the original amount of the dither signal is again subtracted to form the digital output signal. The amount of correlation detected therefore corresponds to a deviation from unity of the gain of the dither signal's path from the PRN generator through the DAC and ADC.
To correct this deviation, feedback control of the gain along the dither signal's path is provided. More specifically, the gain of a circuit element in the path is adjusted by an amount proportional to the correlation until unity gain along the path is achieved. The gain of either the ADC or the DAC may be adjusted in this step. Alternately, an analog amplifier or a digital multiplier can be added to the path to allow adjustment of the gain When a unity gain condition is achieved, there will be no remaining residue of the dither signal in the digital output signal.
The feedback gain control can also be used to effectively control the gain stability of the ADC conversion to equal that of the DAC to thereby reduce gain instability of the ADC. If the gain of the ADC is controlled in accordance with the amount of correlation, it will have the same gain stability as the DAC. The same effect is achieved when the gain of an analog amplifier or digital multiplier connected in series with the ADC is instead controlled.
Gain error correction by this method is also possible when the conversion of analog signal to digital is performed by multiplexed ADCs. The multiplexed ADCs will be connected in parallel as previously indicated. To control the gain of the multiplexed ADC conversion, an analog amplifier or digital multiplier is connected in series with the multiplexed ADCs. The gain of the analog amplifier or digital multiplier is controlled according to the correlation of the digital output with the dither signal as described above to provide overall gain stability to the multiplexed ADC conversion.
The present invention also includes detecting and correcting multiplexed ADC differential gain errors. As explained previously, with multiplexed ADCs, an analog signal is alternately sampled by each ADC. The digitized samples produced by the separate ADCs are combined into a single output stream. When the gain of the separate ADCs are different, this output stream will contain amplitude errors. In other words, the separate ADCs may produce different digital values for the same value of analog signal.
The present invention uses feedback gain control based on correlation with the dither signal to eliminate this differential gain error, i.e., the amplitude error caused by multiplexing ADCs having different gains. The feedback gain control adjusts the gain of each additional ADC in the set of multiplexed ADCs to equal the gain of a first ADC in the set. In this manner, the gain of each ADC of the set is the same.
A difference in gain between ADCs is detected by, first, digitally multiplying the output stream of one of the additional ADCs in the set of multiplexed ADCs by negative one. The resulting stream is then combined with the output stream of the first ADC. If there is a difference in gain between the two ADCs, there will be some residue of the dither signal in this combined stream. Thus, by correlating the combined stream with the original dither signal, the amount of the gain difference is measured The gain of the additional ADC is adjusted to null out this gain difference If the gain of an ADC is not directly adjustable, an analog amplifier or digital multiplier may be connected in series with the ADC. The overall gain of the series combination is adjustable by adjusting the gain of the amplifier or multiplier. The gain of the other ADCs in the multiplexed set are also adjusted in the same way to equal the gain of the first ADC. With the gain of all the ADCs equal to that of the first, differential gain errors are eliminated.
In an alternate embodiment of the invention, differential gain errors are corrected in a different manner. Instead of controlling the gain of each of the additional multiplexed ADCs to equal the gain of the first ADC, the gain of each dither signal path from the PRN generator, through the DAC and one of the ADCs is controlled to equal unity Only the ADC portion of each of these paths is different. If each of the paths is controlled to have unity gain, the ADC portion of each path must have the same gain. Any difference in gain between ADCs is thus eliminated. Since each dither path also has unity gain, gain error has also been corrected and gain stability provided.
An additional advantage to the circuitry of the present invention is that it can be easily adapted to include predictive analog-to-digital conversion. Prediction is useful in analog-to-digital conversion to increase the dynamic range of the ADC. The introduction and use of dither in ADCs, such as in the present invention, actually reduces the dynamic range depending on the amount of dither introduced. The decrease may be significant if large scale dither is used.
In a predictive conversion scheme, digital signal processing circuitry is provided to predict the value of the next sample. This predicted value is subtracted from the analog signal before conversion and added back in after the conversion Thus, the value converted by the ADC is merely the small difference between the actual value of the sample and the predicted value of the sample. Therefore, with prediction, the ADC need only be capable of resolving values in a much smaller range than the actual range of values to be converted. Depending on the accuracy of the prediction, the ADC need only resolve values in a very narrow range, enabling the circuitry to resolve values within the range to much finer quantization levels.
In the present invention, the same circuitry for introducing the dither signal before the ADC conversion and subtracting it out of the digital output stream may be used for prediction. In addition to converting the dither signal, the DAC may be used to bias the ADC to a narrow range of values near the anticipated value of the next sample. In other words, the negative of the predicted value of the next sample is added to the dither signal (digital noise word) and converted to analog by the DAC. The same value is subtracted with the dither signal from the output. This combined dither and predictive signal may be used to correlate against the ADC's output to correct amplitude and gain errors as was done with the dither signal alone.
The foregoing and additional features and advantages of the present invention will be more readily apparent from the following detailed description, which proceeds with reference to the accompanying drawings.